Measuring Strain Fields surrounding Grain-Boundary Dislocations in Silicon using Scanning Transmission Electron Microscopy

Mapping atomic displacement at the nanoscale is crucial for developing and optimizing strain-engineered devices. In today’s transistors, a slight deformation of the silicon lattice in the source-drain regions enhances their performance. And in the future, strain-induced electro-optic effects may potentially form the basis of an all-silicon electronic and photonic device. Transmission electron microscopy (TEM) has been established as a reliable tool to quantitatively measure atomic displacements at high spatial resolution. Several approaches have proven to be successful, and include techniques based on diffraction and holography. Alternatively, strain fields can also be extracted directly from atomic resolution images with peak finding, or geometric phase analysis (GPA) [1]. A major challenge in applying these methods to conventional high-resolution TEM has been to identify errors that may propagate through data processing. TEM imaging is particularly sensitive to the defocus value and the specimen thickness, thus, the observed variations of lattice fringes may not necessarily correspond to real atomic displacement.